ASML and TSMC work on High-NA EUV upgrade
ASML is teaming up with Taiwan Semiconductor Manufacturing Co. to upgrade its most advanced chipmaking machines, a move that could speed adoption of High-NA EUV tools and remove one of the biggest bottlenecks to making the next generation of AI chips.
The collaboration matters because the semiconductor industry cannot scale cutting-edge production on machinery alone; it also needs mask makers, chip designers and foundries to move in lockstep. By lining up TSMC, ASML’s biggest customer, with Intel, Samsung and other chipmakers behind a larger 12-by-6-inch mask format, the industry is setting the standard that could make High-NA economically viable beyond labs and pilot lines.
For investors, the deal reinforces ASML’s grip on the most advanced lithography market and gives TSMC a clearer path to keeping pace as AI chips get larger and more complex. ASML said it generated 6.6 billion euros of chip-machine sales in the latest quarter, with 57% from EUV systems, while TSMC is building 20 fabs and has said it expects to nearly double spending on chip tools as AI demand surges.
High-NA machines are faster but currently have a smaller exposure field, forcing larger chip designs to be split and stitched together in extra steps. A larger mask lets the tool project bigger patterns in one go, which should cut processing complexity and help the technology move from niche deployment toward mass production.
TSMC plans to use High-NA for mass production around 2030, while mass production using the larger mask size is expected to begin from 2033. Intel is the only company already using High-NA in volume production, though research labs in Belgium and the U.S. are also testing the technology.
The shift also underscores how AI is reshaping semiconductor capital spending, particularly at TSMC, which supplies Nvidia, Apple, Google and AMD. The next catalyst is whether mask makers and equipment suppliers can retool fast enough to match the industry’s timetable for High-NA deployment.
| Entity | Gains | Losses |
|---|---|---|
| ASML | ▲Faster High-NA adoption | ▼Less risk on tool redesign |
| TSMC | ▲Clearer path to AI chip scaling | ▼More capital spending |
| Intel | ▲Early High-NA lead | ▼Needs execution to hold edge |
| Mask makers | ▲New demand for larger masks | ▼Retooling costs |